Frequency dividers are products that dynamically divide the frequency of a clock signal into clock signals having lower frequencies. The frequency division occurs in response to a ratio that is determined by a control signal. It is preferable to provide a signal having a symmetrical duty cycle, e.g., a duty cycle of 50 percent. Known frequency division systems typically use a programmable counter to perform frequency division but, to achieve a 50% duty cycle, also include a divide-by-2 stage, to generate rising and falling edges of an output clock signal. This divide by 2 stage limits division ratios to multiples of two.
The inventors perceive a need to provide frequency dividers that have a wider range of frequency division ratios, including ratios that are not multiples of two.